1. Field of the Invention
The present invention relates mainly to a bipolar type semiconductor device, and more particularly to a surface passivation for a bipolar transistor having an emitter region in which a diffusion length of minority carriers is designed relatively larger than the thickness of the emitter region.
2. Prior Art of the Invention
In a prior art bipolar transistor, a base region is formed by a selective diffusion into a collector region and an emitter is formed by a second diffusion into the base region with sufficiently high impurity concentration. In such a double diffused type or heavily doped emitter type transistor, an emitter-grounded current amplification factor h.sub.FE is increased by the heavy doping of impurities in the emitter resulting a high emitter efficiency. However, such a transistor is apt to include lattice dislocation in the emitter region because of the heavy doping in the degree of 10.sup.19 .about.10.sup.20 atoms .multidot. cm.sup.-3 or more. Further, an insufficient crystal characteristics at the emitter-base junction and a small diffusion length of carriers cause a limitation for the increase of the h.sub.FE.
In order to improve the bipolar transistor, a low impurity concentration emitter type transistor was proposed, in which the emitter has a lightly doped emitter region. This transistor is fabricated, for example, by the following steps. First of all, an N type silicon substrate doped with relatively high impurities is prepared. An N type silicon layer doped with relatively low impurities is formed on the silicon substrate by the epitaxial grown technique. This silicon layer becomes a collector region of the transistor. A P type base region is selectively diffused and formed in the N type epitaxial collector region by the ion-implantation or the conventional diffusion technique. A second epitaxially grown layer of N type is formed on the surface of the base region and the remaining surface portion of the collector region. Then, an insulating layer, such as silicon dioxide (SiO.sub.2) is thermally grown on the second epitaxially grown layer. A P type ring-shaped region for the base contact is formed by the selective diffusion penetrating through the second epitaxial layer and reaching the base region, and a heavily doped emitter region of N type is formed by another diffusion into the second N type epitaxial layer so that the heavily doped emitter region is surrounded by the ring-shaped P type region. Finally, electrodes are formed. In this case a surface of portion of semiconductor regions especially surface ends of PN junctions are covered by the insulating layer.
Since the insulating layer sandwiched between the semiconductor layer and incidentally induced electric charges upon the insulating layer constructs a capacitive element, the surface of the semiconductor region is apt to be affected by the external electric field caused by fixed ions in the insulating layer or by the polarization of the region molding the semiconductor device.
In order to avoid such an affection or phenomenon, the other passivation layer of a polycrystalline silicon layer having high resistivity may be considered in stead of the silicon dioxide layer. However, the polycrystalline silicon passivation layer causes the increase of leakage current through the layer because of its lower resistivity than that of the silicon dioxide. Moreover, if the polycrystalline silicon layer is formed on the surface of the lightly doped emitter region of the above mentioned bipolar transistor, the emitter grounded current amplification factor h.sub.FE is decreased, since minority carriers injected from the base region into the lightly doped emitter region reach and recombine at the interface between the polycrystalline silicon and the emitter region.